Paper Title
DESIGN AND COMPARATIVE STUDY OF TRANSMISSION GATE BASED 8T SRAM DESIGN WITH HYBRID LOW POWER TECHNIQUE FOR SMART DEVICES

Abstract
Need for low power in portable and smart devices along with robustness of the device are the demands to be fulfilled for sustaining in the VLSI semiconductor industry. SRAM memory is the main part of the core design in chips. It is important to reduce the leakage power consumption during the steady mode of the device for long run of battery. Proposed article has better performance in respect of area ,power usage and delay. Also stability of the data improved. Peripheral of SRAM has been eliminated and replaced by transmission gate with power gating low power method. Implemented on virtuoso cadence software for schematic at 0.45nm technology. Keywords - SRAM, IOT applications, Low power.